Difference between revisions of "CSC270 Homework 2 2011"
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Implement the circuit of Homework #1 with NANDs only. One way to do so is to figure out a way to rewrite the expression for the circuit is such a way that it is a combination of terms of the form not( X and Y ). | Implement the circuit of Homework #1 with NANDs only. One way to do so is to figure out a way to rewrite the expression for the circuit is such a way that it is a combination of terms of the form not( X and Y ). | ||
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| − | + | ;Question 1 | |
| − | + | : What is the function Q( A, B, C ) implemented by the circuit shown above, where the gates are NAND gates ? | |
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| − | + | ;Question 2 | |
| + | : What is the diagram of Q using only NOT, OR, and AND gates? | ||
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| + | ;Question 3 | ||
| + | : What is the '''minterm canonical form''' of Q? | ||
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| + | ;Question 4 | ||
| + | : What is its '''Maxterm''' canonical form? | ||
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Revision as of 15:52, 3 February 2011
--D. Thiebaut 15:40, 3 February 2011 (EST)
Page under construction!
This assignment deals with minterms, Maxterms, Nands and Nors.
Problem #1
- Question 1
- Is the gate below a universal gate? It is an AND gate that inverts its input. If a and b are on the other side of the left red wires, the output will be not a and not b.
- Make sure you explain why this gate is, or is not, a universal gate. A yes or no answer will not get any credit!
Problem #2
- Question 1
Implement the circuit of Homework #1 with NANDs only. One way to do so is to figure out a way to rewrite the expression for the circuit is such a way that it is a combination of terms of the form not( X and Y ).
Problem 3
- Question 1
- What is the function Q( A, B, C ) implemented by the circuit shown above, where the gates are NAND gates ?
- Question 2
- What is the diagram of Q using only NOT, OR, and AND gates?
- Question 3
- What is the minterm canonical form of Q?
- Question 4
- What is its Maxterm canonical form?
