Difference between revisions of "CSC270 Lab 5 2012"
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* Draw the state diagram of this ''finite-state machine'' (FSM). | * Draw the state diagram of this ''finite-state machine'' (FSM). | ||
− | * Implement and wire-up a divide-by-4 frequency divider. Make the scope show the frequency of your signals. Demonstrate that your divider works! | + | ==2-Flip-flop Oscillator== |
− | + | * Implement and wire-up a ''divide-by-4'' frequency ''divider''. Make the scope show the frequency of your signals. Demonstrate that your divider works! | |
− | |||
− | |||
* Bring the Clock frequency to 1 Hz and connect the two Q outputs to LEDs (if they aren't already connected). | * Bring the Clock frequency to 1 Hz and connect the two Q outputs to LEDs (if they aren't already connected). | ||
* Observe the behavior of the outputs on the LED display. Do the LEDs count in binary UP or DOWN? | * Observe the behavior of the outputs on the LED display. Do the LEDs count in binary UP or DOWN? | ||
− | == | + | ==An FSM With 2 Flip-flops== |
− | * Build a state-machine with 2 flip-flops. | + | * Build a state-machine with 2 flip-flops. Flip-flop 0 has input D0 and outputs Q0 and Q0'. Flip-flop 1 has input D1 and outputs Q1 and Q1'. |
* Perform the following connections. | * Perform the following connections. | ||
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** Connect the Pr1, Pr0 inputs to a momentary switch with a default high level. | ** Connect the Pr1, Pr0 inputs to a momentary switch with a default high level. | ||
** Connect the Clr1, Clr0 inputs to another momentary switch with a default high level. | ** Connect the Clr1, Clr0 inputs to another momentary switch with a default high level. | ||
− | ** Connect the two clock | + | ** Connect the two clock inputs to the 1 Hz clock signal. |
** Connect Q0 and Q1 to two LEDs | ** Connect Q0 and Q1 to two LEDs | ||
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: Again, how many different states does your machine have? | : Again, how many different states does your machine have? | ||
+ | ;Question 4 | ||
+ | : What is your conclusion about the number of states a FSM with ''n'' flip-flops will have? | ||
− | =FSM | + | =Designing an FSM from scratch= |
− | * Wire up | + | * Wire up an FSM with one output signal whose timing diagram is shown below. |
<br /> | <br /> | ||
− | <center>[[Image:CSC270TimingDiagram3States.png|350px]]</center> | + | <!--center>[[Image:CSC270TimingDiagram3States.png|350px]]</center--> |
+ | <code><pre> | ||
+ | +-------+ +-------+ | ||
+ | | | | | | ||
+ | ---+ +-------+-------+-------+ +------- | ||
+ | </pre></code> | ||
<br /> | <br /> |
Latest revision as of 14:08, 29 February 2012
--D. Thiebaut 18:45, 28 February 2012 (EST)
Contents
LAB #5: The 74LS74 D-Flip-Flop
The 74LS74 chip contains two flip-flops:
- Put one on your bread board, and connect
- Preset and Clear to two switches,
- D to another switch, and
- Clock to the 1Hz clock signal.
- Set both Preset and Clear to 1.
- Connect D, Clock, Q, and Q-bar to 4 LEDs.
- Slowly change the D input from low to high and observe how the signals change.
- From your observations, complete the timing diagram below so that we can see how Q and Q-bar change, according to your observations, not to what you think should happen.
Activating the Clear Input
Same question, but this time you will set the Clear input to 0.
Activating the Preset Input
Same question, but this time you will set the Preset input to 0 (and return Clear to 1).
A Simple Oscillator
- Implement the circuit below (you are welcome to simplify the circuit if you wish!):
- Connect both the Clock and Q signals to logic indicators. Set the Clock to 1 Hz.
- Connect CLR and PR to 1.
- What is the frequency at which the Q output oscillates?
- Now set the clock frequency to 100 KHz (100,000 Hertz) and observe Clock and Q on the scope.
- What is the relationship between the frequency of Q and the frequency of the clock input? Does the 74LS74 wired this way behave as a frequency multiplier or a frequency divider?
- Draw the state diagram of this finite-state machine (FSM).
2-Flip-flop Oscillator
- Implement and wire-up a divide-by-4 frequency divider. Make the scope show the frequency of your signals. Demonstrate that your divider works!
- Bring the Clock frequency to 1 Hz and connect the two Q outputs to LEDs (if they aren't already connected).
- Observe the behavior of the outputs on the LED display. Do the LEDs count in binary UP or DOWN?
An FSM With 2 Flip-flops
- Build a state-machine with 2 flip-flops. Flip-flop 0 has input D0 and outputs Q0 and Q0'. Flip-flop 1 has input D1 and outputs Q1 and Q1'.
- Perform the following connections.
- D1 = Q0
- D0 = Q1 NOR Q0
- Connect the Pr1, Pr0 inputs to a momentary switch with a default high level.
- Connect the Clr1, Clr0 inputs to another momentary switch with a default high level.
- Connect the two clock inputs to the 1 Hz clock signal.
- Connect Q0 and Q1 to two LEDs
- Question 1
- How many states does your machine have?
- Question 2
- Activate the momentary switch that is connected to the Preset inputs a few times. What happens with Q1 and Q0?
- Question 3
- Again, how many different states does your machine have?
- Question 4
- What is your conclusion about the number of states a FSM with n flip-flops will have?
Designing an FSM from scratch
- Wire up an FSM with one output signal whose timing diagram is shown below.
+-------+ +-------+
| | | |
---+ +-------+-------+-------+ +-------