Difference between revisions of "CSC270 Homework 2 2016"
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[[Image:AreTheseUniversal.png|center]] | [[Image:AreTheseUniversal.png|center]] | ||
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| − | * The top gate, above, is an AND gate with an inverted input. The gate below it is an exclusive OR with an inverted input. The equation for the first one, assuming that the inputs are ''a'' and ''b'', is ''a . (b')''. The equation for the bottom one is ''a'' ⊕ ''b' '' | + | * The top gate, above, is an AND gate with an inverted input. The gate below it is an exclusive OR with an inverted input. The equation for the first one, assuming that the inputs are ''a'' (on the lower input) and ''b'' (on the upper one), is ''a . (b')''. The equation for the bottom one is ''a'' ⊕ ''b' '' |
* Is one, or both of the gates above universal? Why or why not? | * Is one, or both of the gates above universal? Why or why not? | ||
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| + | =Problem 2= | ||
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| + | * Simplify the following functions using Karnaugh maps. Please show each Karnaugh map and its covers in your answer. If you can simplify the functions further by using some of the theorems of Table 2.2, then do so. Basically write the function so as to minimize the number of operators ( dot, plus, prime). | ||
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| + | f(a, b, c, d) = Σ (0, 1, 2, 3, 12, 13, 14, 15 ) | ||
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| + | g(a, b, c, d) = Σ (0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 12, 13, 14, 15 ) <font color = "magenta"># 11 missing!</font> | ||
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| + | h(a, b, c) = Π ( 0, 1, 2, 3 ) | ||
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| + | k(a, b, c, d) = Π (0, 1, 7, 8 ) | ||
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| + | =Problem 3= | ||
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| + | * A ''majority voter'' is a circuit that has 3 inputs and one output. The output always represents the '''majority''' of the inputs. For example, when there are 2 or 3 1s on the inputs, then the output is 1. When there are 2 or 3 0s on the inputs, then the output is 0. | ||
| + | * Generate the truth table for the majority voter of 3 signals, a, b, and c. | ||
| + | * Implement the majority voter with a 3-to-8 decoder, active-high outputs, and no enable signal and whatever other gates you need. Show the diagram (no need for pin numbers or part numbers). | ||
| + | * Implement the majority voter with a 3-to-8 decoder, active-low outputs, active-low enable, and only NAND gates. | ||
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| + | =Problem 4= | ||
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| + | Write a python or java program that simulates a 3-to-8 decoder with an active-high enable, and active high outputs. You need to have a function that receives 4 inputs and returns 8 outputs. Make the program outputs the truth table for the decoder. Include both your source code and the output of the program, clearly showing the truth table. | ||
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| + | [[Category:CSC270]][[Category:Homework]] | ||
Latest revision as of 22:05, 11 February 2016
--D. Thiebaut (talk) 13:28, 4 February 2016 (EST)
This homework is due on 2/11/16 at 11:55 p.m. You can work individually or in a group of two.
Contents
Problem 1
- The top gate, above, is an AND gate with an inverted input. The gate below it is an exclusive OR with an inverted input. The equation for the first one, assuming that the inputs are a (on the lower input) and b (on the upper one), is a . (b'). The equation for the bottom one is a ⊕ b'
- Is one, or both of the gates above universal? Why or why not?
Problem 2
- Simplify the following functions using Karnaugh maps. Please show each Karnaugh map and its covers in your answer. If you can simplify the functions further by using some of the theorems of Table 2.2, then do so. Basically write the function so as to minimize the number of operators ( dot, plus, prime).
f(a, b, c, d) = Σ (0, 1, 2, 3, 12, 13, 14, 15 ) g(a, b, c, d) = Σ (0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 12, 13, 14, 15 ) # 11 missing! h(a, b, c) = Π ( 0, 1, 2, 3 ) k(a, b, c, d) = Π (0, 1, 7, 8 )
Problem 3
- A majority voter is a circuit that has 3 inputs and one output. The output always represents the majority of the inputs. For example, when there are 2 or 3 1s on the inputs, then the output is 1. When there are 2 or 3 0s on the inputs, then the output is 0.
- Generate the truth table for the majority voter of 3 signals, a, b, and c.
- Implement the majority voter with a 3-to-8 decoder, active-high outputs, and no enable signal and whatever other gates you need. Show the diagram (no need for pin numbers or part numbers).
- Implement the majority voter with a 3-to-8 decoder, active-low outputs, active-low enable, and only NAND gates.
Problem 4
Write a python or java program that simulates a 3-to-8 decoder with an active-high enable, and active high outputs. You need to have a function that receives 4 inputs and returns 8 outputs. Make the program outputs the truth table for the decoder. Include both your source code and the output of the program, clearly showing the truth table.
