Difference between revisions of "CSC231 Lab 3 (Digital Electronics)"
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| + | <bluebox>This lab is the continuation of [[CSC231 Lab 2 (Digital Electronics) | Lab 2]] | ||
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=Preamble= | =Preamble= | ||
| − | * Assume that we have two boolean variables, a and b. How could you prove that the following equality always | + | * Assume that we have two boolean variables, a and b. How could you prove that the following equality always holds? |
a + a'. b = a + b | a + a'. b = a + b | ||
| Line 74: | Line 26: | ||
* Write down all 8 possible additions of 3 bits, and show the two bits that result: ''Carry'' and ''Sum'', in a manner similar to the example below | * Write down all 8 possible additions of 3 bits, and show the two bits that result: ''Carry'' and ''Sum'', in a manner similar to the example below | ||
| + | <source lang="text"> | ||
0 | 0 | ||
+ 0 | + 0 | ||
| Line 79: | Line 32: | ||
------ | ------ | ||
X X | X X | ||
| − | + | </source> | |
* Fill out the truth table below where '''a''', '''b''', and '''d''' are the three bits that are added together, '''C''' is the carry, and '''S''' the sum. | * Fill out the truth table below where '''a''', '''b''', and '''d''' are the three bits that are added together, '''C''' is the carry, and '''S''' the sum. | ||
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| − | < | + | <source lang="text"> |
a b d | C S | a b d | C S | ||
-----------+-------- | -----------+-------- | ||
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1 1 0 | | 1 1 0 | | ||
1 1 1 | | 1 1 1 | | ||
| − | </ | + | </source> |
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|} | |} | ||
| + | |||
| + | =Data Sheets= | ||
| + | |||
| + | If you need to refer to the data sheets of various chips during the lab, you can click on any of the links below: | ||
| + | If the datasheets haven't been printed yet, print a set from these links: [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls00rev5.pdf 74LS00] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls01rev5.pdf 74LS01] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls02rev5.pdf 74LS02] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls03rev5.pdf 74LS03] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls04rev5.pdf 74LS04] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls05rev5.pdf 74LS05] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls08rev5.pdf 74LS08] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls09rev5.pdf 74LS09] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls10rev5.pdf 74LS10] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls12rev5.pdf 74LS12] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls13rev5.pdf 74LS13] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls15rev5.pdf 74LS15] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls20rev5.pdf 74LS20] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls21rev5.pdf 74LS21] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls22rev5.pdf 74LS22] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls26rev5.pdf 74LS26] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls27rev5.pdf 74LS27] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls28rev5.pdf 74LS28] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls30rev5.pdf 74LS30] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls32rev5.pdf 74LS32] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls33rev5.pdf 74LS33] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls37rev5.pdf 74LS37] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls38rev5.pdf 74LS38] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls40rev5.pdf 74LS40] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls42rev5.pdf 74LS42] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls47rev5.pdf 74LS47] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls48rev5.pdf 74LS48] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls51rev5.pdf 74LS51] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls54rev5.pdf 74LS54] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls55rev5.pdf 74LS55] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls74arev5.pdf 74LS74] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls75rev5.pdf 74LS75] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls76arev5.pdf 74LS76] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls83arev5.pdf 74LS83] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls85rev5.pdf 74LS85] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls86rev5.pdf 74LS86] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls90rev5.pdf 74LS90] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls95brev5.pdf 74LS9] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sn74ls138rev5.pdf 74LS13] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/CD74hct240.pdf 74HCT24] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/sdls145.pdf 74LS24] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/CD74hct244.pdf 74HCT24] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/DM74LS259.pdf 74LS25] | ||
| + | [http://cs.smith.edu/~thiebaut/classes/270/datasheets/CD74hct541.pdf 74HCT54]. | ||
<br /> | <br /> | ||
Latest revision as of 06:41, 18 November 2014
© D. Thiebaut, 2010
Back to the weekly schedule
This lab is the continuation of Lab 2
Preamble
- Assume that we have two boolean variables, a and b. How could you prove that the following equality always holds?
a + a'. b = a + b
- (a' represents not a )
3-Bit Adder
- Write down all 8 possible additions of 3 bits, and show the two bits that result: Carry and Sum, in a manner similar to the example below
0
+ 0
+ 0
------
X X
- Fill out the truth table below where a, b, and d are the three bits that are added together, C is the carry, and S the sum.
a b d | C S
-----------+--------
0 0 0 |
0 0 1 |
0 1 0 |
0 1 1 |
1 0 0 |
1 0 1 |
1 1 0 |
1 1 1 |
- Generate the boolean expressions for C and S. This steps will require the whole class to work together! Keep on simplifying until you find an expression for S with only 2 operators, and an expression for C with only 5 operators!
- Generate the schematics for the circuit generating C and S
- Use the data sheets provided to assign pin numbers to the gates.
- Wire it up and demonstrate that you can correctly add 3 bits together!
Useful Gates
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Inverter: 74LS04 |
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AND gate: 74LS08 |
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OR gate: 74LS32 |
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Exclusive OR: 74LS86 |
Data Sheets
If you need to refer to the data sheets of various chips during the lab, you can click on any of the links below: If the datasheets haven't been printed yet, print a set from these links: 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS08 74LS09 74LS10 74LS12 74LS13 74LS15 74LS20 74LS21 74LS22 74LS26 74LS27 74LS28 74LS30 74LS32 74LS33 74LS37 74LS38 74LS40 74LS42 74LS47 74LS48 74LS51 74LS54 74LS55 74LS74 74LS75 74LS76 74LS83 74LS85 74LS86 74LS90 74LS9 74LS13 74HCT24 74LS24 74HCT24 74LS25 74HCT54.
