Difference between revisions of "CSC270 Homework 6 2011"
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− | :We saw in class that the bits represented as X in bbXXbbbb in opcodes are used by the CU to decide on the type of cycle to execute an instruction. Study the instruction set and see if you can find other bits that influence how the CU operates. The idea here is too look at the same instruction and different addressing modes and see how the opcodes differ, and how the cycles followed by the FSM differ. Try to find examples that do not highlight the same XX bits as we found earlier. | + | :We saw in class that the bits represented as X in bbXXbbbb in opcodes are used by the CU to decide on the type of cycle to execute an instruction. Study the instruction set and see if you can find other bits that influence how the CU operates. The idea here is too look at the same instruction and different addressing modes or different operands and see how the opcodes differ, and how the cycles followed by the FSM differ. Try to find examples that do not highlight the same XX bits as we found earlier. |
Revision as of 14:48, 25 March 2011
--D. Thiebaut 10:11, 23 March 2011 (EDT)
This homework is officially released on Friday 3/25/11, and will be due the following Friday at midnight.
Problem #1: CU = FSM
We saw in class that the 6811 Control Unit is a big Finite State Machine (FSM) and that it is controlled by bits from the Instruction Register (IR).
- Question 1
- Study the instruction set of the 6811 and find the smallest cycle that the FSM supports, and the longest one. In other words, assuming that the Instruction Fetch (IF) State is always the first of a cycle, find the smallest cycle of the FSM starting at IF and returning at IF, and the longest one, starting at IF and also returning at IF.
- Question 2
- What instructions did you find correspond to the shortest and to the longest cycles?
- Question 3
- Without spending too much time on this, but with appropriate justification, and assuming that all instructions as as likely to be executed by the 6811, what is the average number of cycles taken by the 6811 to execute its instructions.
- Question 4
- It has been shown that for most programs, of all the instructions executed by processors (across all kinds of processors), about 50% of them are data move instructions (LDAA, STAA, LDX, STX, etc.), and 25% are arithmetic and logic instructions (ADDA, etc...), and about 12.5% are control instructions (JMP, BNE, BEQ, BRA, etc). In view of these statistics, and again, without spending too much time on this, but explaining how you proceed, what is the average number of cycles taken by the 6811 to execute instructions?
- Question 5
- We saw in class that the bits represented as X in bbXXbbbb in opcodes are used by the CU to decide on the type of cycle to execute an instruction. Study the instruction set and see if you can find other bits that influence how the CU operates. The idea here is too look at the same instruction and different addressing modes or different operands and see how the opcodes differ, and how the cycles followed by the FSM differ. Try to find examples that do not highlight the same XX bits as we found earlier.