CSC270 Class Page 2009

Back to Main Page for CSC270

---

Prof and TA

Dominique Thiébaut email Dept. Computer Science McConnell Hall, 208. Telephone: 3854 Office hours MW 10:30-12:00, W 1-3, and by appointments

The TA for the class is Lei Lei, and her hours and location are available here

Weekly Schedule

Week	Topics	Reading
Week 1 1/26	Monday: Introduction to the semester Syllabus Overview of the class combinational logic (1/4) sequential logic( 1/4) microprocessor logic (1/2) Boolean Algebra Truth tables Boolean functions Wednesday: boolean functions canonical forms: the minterm canonical form exercises examples of schematics from Nasa logic gates and gate (7408) or gate (7432) not gate (7404) Lab #1 Homework #1	Binary numbers Boolean algebra and Logic Gates Basic theorems Truth tables Boolean functions Canonical forms George Boole
Week 2 2/2	Monday Maxterm canonical form NAND and NOR gates Wednesday Python program to generate a truth table A fully developed example: a majority voter, with 3 inputs, a Majority output, a Fault output, and two Id outputs identifying the faulty input. Introduction to Karnaugh Maps Lab #2 Homework #2	Canonical Forms Universal gates: NAND and NOR
Week 3 2/9	Tips and Tricks: counting the number of inversions on a signal path MSI: medium scale integration decoders The 74LS42 decoder multiplexers
Week 4 2/16	2/16   2/18 Rally Day, No Class
Week 5 2/23
Week 6 3/2
Week 7 3/9	3/11 Midterm Exam
Week 8 3/16	SPRING BREAK
Week 9 3/23
Week 10 3/30
Week 11 4/6
Week 12 4/13
Week 13 4/20
Week 14 4/27	4/29: 1-week Take-Home Final Exam

---

Back To Main Page

---

Links and Resources

Programs

• A Python program that generates a truth table.

Software

PSpice 9

• Pspice 9, Student version. An nice alternative to drawing schematics by hand.
• This is a Windows version. (I have tried to make it work under wine/Mac OS X but haven't been able to make it load the libraries correctly)
• Make sure you select the schematics option when installing the software.
• Select Tools/Schematics when starting the editor
• The schematics editor is located in C:\Program Files\OrCAD_Demo\PSpice\PDesign.exe upon installation.
• Download here!
• PSpice Tutorial

Integrated Circuit Data-Sheets

• Java Applets demonstrating most logical gates
• Texas Instruments and Harris Semiconductors' Data Sheet Search Engine
• Fairchild Semiconductors' Data Sheet Search Engine
• 74LS00, 74LS01, 74LS02, 74LS03, 74LS04, 74LS05, 74LS08, 74LS09, 74LS10, 74LS12, 74LS13, 74LS15, 74LS20, 74LS21, 74LS22, 74LS26, 74LS27, 74LS28, 74LS30, 74LS32, 74LS33, 74LS37, 74LS38, 74LS40, 74LS42, 74LS47, 74LS48, 74LS51, 74LS54, 74LS55, 74LS74, 74LS75, 74LS76, 74LS83, 74LS85, 74LS86, 74LS90, 74LS95, 74LS138, 74HCT240, 74LS243, 74HCT244, 74LS259, 74HCT541

• 9368
• 2114 1Kx4 RAM

Motorola 68HC11 Documentation

• Good source of info on the 6811.
• 6811 FAQs.
• The official Motorola | 68HC11A8 Data Sheet. Fairly cryptic...
• A Motorola 6811 Manual. It is a nicely written refresher on many concepts of assembly language applied to the 6811.
  • Check Section 3.2 on addressing modes (inherent, direct, extended, indexed, relative).
  • Get a refresher for the different instruction types (arithmetic, shifts, control, etc) in Section 3.4.
  • The condition code register is covered in Section 3.5.
• M68HC11 Technical Reference, Motorola
  • Section 6.5 shows the instructions in logical groups.
• M68HC11 Pocket Reference.
  • Very useful, on Page 15, a list of all the opcodes supported by the 6811, in numerical (hex) order.
• 68HC11A8 Technical Reference: a hardware and engineering description. of the 6811, its ports, and how it operates.
  • See Section 10 for a cycle-by-cycle description of the execution of each instruction.
  • See Appendix A, Figure A-14 for the timing diagram of a typical (multiplexed expansion) memory access.

---

Back To Main Page

---