Difference between revisions of "CSC270 Homework 3 2016"
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--[[User:Thiebaut|D. Thiebaut]] ([[User talk:Thiebaut|talk]]) 20:13, 9 February 2016 (EST) | --[[User:Thiebaut|D. Thiebaut]] ([[User talk:Thiebaut|talk]]) 20:13, 9 February 2016 (EST) | ||
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| + | This assignment is due on Thursday 2/18/16, at 11:55 p.m. You can work on this assignment individually or in a pair. Submit your answer as a pdf, on Moodle. | ||
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=Problem 1= | =Problem 1= | ||
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::''Hints'': ''a''-''b'' is really ''a'' + the 2's complement of ''b''. | ::''Hints'': ''a''-''b'' is really ''a'' + the 2's complement of ''b''. | ||
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| − | + | :Design a circuit that has 3 input sets: ''a'', a 32-bit signal, ''b'', another 32-bit signal, and ''x'', a 1-bit signal. The circuit has 33 outputs. When ''x'' is 0, the circuit outputs ''a''+''b''. When ''x'' is 1, the circuit outputs ''a''-''b''. | |
| − | Design a circuit that has 3 input sets: ''a'', a 32-bit signal, ''b'', another 32-bit signal, and ''x'', a 1-bit signal. The circuit has 33 outputs. When ''x'' is 0, the circuit outputs ''a''+''b''. When ''x'' is 1, the circuit outputs ''a''-''b''. | ||
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Latest revision as of 20:30, 9 February 2016
--D. Thiebaut (talk) 20:13, 9 February 2016 (EST)
This assignment is due on Thursday 2/18/16, at 11:55 p.m. You can work on this assignment individually or in a pair. Submit your answer as a pdf, on Moodle.
Problem 1
Below is a 32-bit binary adder. We have seen it in class. It outputs a+b, where a is represented by a31...a0, and b by b31...b0.
- Question 1
- Using this design as inspiration, design a 32-bit subtraction circuit, that will output a-b, if a and b are the two integers whose bits are shown in the diagram.
- Hints: a-b is really a + the 2's complement of b.
- Question 2
- Design a circuit that has 3 input sets: a, a 32-bit signal, b, another 32-bit signal, and x, a 1-bit signal. The circuit has 33 outputs. When x is 0, the circuit outputs a+b. When x is 1, the circuit outputs a-b.
