CSC270 Homework 4
© --D. Thiebaut 15:59, 25 February 2009 (UTC)
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200px This assignment is due on Wednesday, March 4th, at 7:00 p.m.
Exercise 1
Generate the logic diagram, showing flip-flops, AND-, OR-, INVERTERS and/or other gates for a sequencer that activates a Green, a Yellow and a Red signal. The green signal stays on for a while, then the yellow signal turns on at the same time the green turns off, and when the yellow signal turns off, the red signal turns on. As soon as the red signal turns off, the green signal is back on.
The green signal stays on three times longer than the red signal. The yellow signal stays on the same amount of time as the red signal does.
Verify your boolean with a python program, which you will include with your answers.
Exercise 2
What is the full state diagram of a sequencer with 3 flipflops, Q2, Q1, and Q0, and three outputs, G, Y, and R, having the following equations:
D0 = Q0' D1 = Q1.Q0' + Q2.Q1 + Q2'.Q1'.Q0 D2 = Q2 G = Q2'. ( Q1.Q0 )' Y = Q2.Q1'.Q0 R = Q1.Q0
Be careful to include all possible states. In particular, when you turn the sequencer on, the flipflops can be in any of the 8 possible combinations of 3 bits. So you can just as well start in the state (Q2=0, Q1=1, Q0=0), as in the state (Q2=1,Q1=1, Q0=1).