CSC270 Exercises with the D Flip-Flop

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--D. Thiebaut 10:02, 24 February 2012 (EST)

CSC270DFlipFlopsWithFeedbackLoops.png


Problem #1

  • What is the behavior of this circuit on the left? The clock input is 10 Hz. What is the frequency of the Q signal?

Problem #2

  • Same question for the circuit on the right.




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