Difference between revisions of "CSC270 Weekly Schedule 2012"

From dftwiki3
Jump to: navigation, search
(→‎Second Half)
(→‎Second Half)
Line 338: Line 338:
 
||
 
||
 
* '''Monday'''
 
* '''Monday'''
 +
** Review of negative numbers.
 +
** New question: How can we extend a positive or negative number from 1 byte to two bytes?
 +
** Review Condition Code Register
 +
** Rule:
 +
*** Every instruction that makes information pass through ALU will modify the CC bits (HINZVC).  Typical instructions: Add, Sub, Shift, Rotate, Multiply, Divide, And, Or, Not, Xor, and '''Compare''' (which is a subtract operation).
 +
*** Special instructions can modify individual bits: For example '''CLC''' and '''SEC''' can be used to clear or set the '''Carry''' bit.
 +
*** Some instruction can have different outcome depending on some of the CC bits: ''Conditional Branches'': BEQ, BNE, BLT, BGT.
 +
** The '''Compare''' (CMP) instruction:
 +
*** It is a subtract operation that does not store the result of the subtraction, but instead sets the HINZVC bit depending on the result of the subtraction.
 +
** The Conditional Branch instructrions:
 +
*** They operate as follows:
 +
 +
  if ''specific CC bit'' == ''some predefined value'':
 +
        PC = PC + ''displacement''
 +
  else:
 +
        PC = PC + 1
 +
 +
:::For example:
 +
 +
    BEQ, (Branch if equal)
 +
    if  Z bit == 1:
 +
        PC = PC + ''displacement''
 +
    else:
 +
        PC = PC + 1
 +
 +
*** Computing the displacement in hex.  Case #1
 +
 +
      LDAA  alpha
 +
      CMPA  #5         ; alpha==5?
 +
      BEQ    same
 +
diff: ...            ; go here if != 5
 +
      ...
 +
      ...
 +
same: ...            ; go here if == 5
 +
 +
:::Assume BEQ is at Address 0010 and ''same'' at Address ''0023''.  Address of ''diff'' label is at 0012 (because BEQ label takes 2 bytes).  0012 + displacement must be equal to 0023.  Hence displacement is 11 (only 2 digits, as only 1-byte displacement allowed).
 +
 +
*** Case #2:  branching back
 +
 +
same: ...                ; go here if == 5
 +
 +
      LDAA  alpha
 +
      CMPA  #5          ; alpha==5?
 +
      BEQ    same
 +
diff: ...            ; go here if != 5
 +
      ...
 +
      ...
 +
 +
:::Assume BEQ is at address 0020, and ''same'' is at 0005.  The displacement must be a negative number that, once added to 0022 (because that's the address of the instruction after BEQ), will result in 0005.
 +
 +
    0022
 +
+ XXXX
 +
---------
 +
    0005
 +
 +
:::There are many different ways to compute XXXX.  Which ever way we find, we find XXXX = FFE3, so the displacement is the lower byte, or '''E3'''.
 +
 +
 +
 
* '''Wednesday'''   
 
* '''Wednesday'''   
 
* '''Friday'''
 
* '''Friday'''
Line 343: Line 402:
 
*
 
*
 
||
 
||
−
*
+
* Reading
 +
** The condition code register is covered in Section 3.5 of the Motorola [[Media:6811Manual.pdf | 6811 Manual]]. Skip Section 4.
  
 
<!-- ================================================================== -->
 
<!-- ================================================================== -->

Revision as of 09:22, 9 April 2012

--D. Thiebaut 15:03, 18 January 2012 (EST)

Main Page | Weekly Schedule



Office Hours: M 1:10-3:00 p.m., W 4:00-6:00 p.m.

Weekly Schedule

First Half

Week Topics Reading
Week  1
1/27
  • Friday
    • Introduction
      • Syllabus
      • Digital circuits

BuickEngine1973.jpgMercedesEngine2012.jpg 

Skip Chapter 1.
Week 2
1/30
  • Wednesday
    • Boolean functions
    • canonical forms: the minterm canonical form

CSC270 2b or not 2b.png

Start your reading with Chapter 2 on Boolean Algebra.

  • Binary numbers
  • Boolean algebra and Logic Gates
  • Basic theorems
  • Truth tables
  • Boolean functions
  • Canonical forms


George Boole in zeros and ones
George Boole

Week 3
2/6

Reading

  • Karnaugh Maps
  • Decoders
Week 4
2/13
  • Monday

AndGateWithTransistors.jpg TripleInputNorGate.png Eniac4.gif
(Image from Eniac image Clemson U.)

    • Comments on transistors and gates
    • Equivalent of a Decoder in Java or Python?
    • Karnaugh maps for 3, 4, and 5 variables.
    • Don't care conditions with Karnaugh maps
  • Wednesday
    • Exercises
    • Decoders with an enable input. (moving toward microprocessor architecture)
  • Friday
    • Decoders and Multiplexers in Computers
  • Chapter 4: decoders, multiplexers
Week 5
2/20
  • Monday
    • Something to study for a while...
RSFlipFlopNORs.png
    • Answer of the day: It's a sequential circuit: it behaves differently depending on initial conditions!
    • It's a machine with 2 states: it has a state diagram!
    • We cannot use a truth table to represent its behavior
    • It has memory: it can store a bit
    • Why does it work? Because the two gates that form this circuit can be eith blocking or passing, and when they are passing, the state, whichever it is, is stable.
    • End of the lecture was with timing diagrams, and showing that Q and Q' can be in either one of the possible cases: 01 or 10, and we show that on the timing diagram.
  • Wednesday
    • Toward the D Flip-Flop:
      • From RS to RS with 1 input only
      • From RS with 1 input only to RS with a pulse clock latch signal
      • From RS with a latch signal to a Master/Slave (sorry, this is the way it is coined) flip-flop
      • The D Flip-Flop. 74LS74 datasheet.
  • Friday
    • Comments on last lab:
      • A note on scale: http://htwins.net/scale2/
      • units are important! Know the difference between Volts, millivolts, seconds, milliseconds, microseconds, nanoseconds.
      • How does a scope work?
  • Chapter 5: synchronous sequential logic


Week 6
2/27
  • Monday
  • Finite State Machines: Moore vs. Mealy machines.
    • Two examples: a two-state oscillator, and a controlled oscillator
    • Designing a FSM that has a command input. If the command signal (cmd) is 1, the FSM oscillates. If the command signal is 0, the FSM stays in its current state.
      • Draw the state diagram
      • Figure out the number of flip-flops needed
      • Draw the State table, associating States to values of the Q output(s)
      • Draw the State Transition table.
      • Define the D inputs as a function of the Q outputs
      • Draw the FSM with flip-flop(s) and combinational logic
      • Verify with a timing diagram that the circuit works
  • Wednesday
  • Friday
  • Chapter 5: synchronous sequential logic


Week 7
3/5
  • Monday
    • The JK Flip-Flop
    • diagram
    • Exercise 1: Let's figure out how to design a FSM without external input first.
    • Exercise 2: Same idea, with a user input.
  • Wednesday
Week 8
3/12










SpringBreak.png

Second Half

Week Topics Reading
Week  1
3/26
WhiteSpace3.png




WhiteSpace2.png

Week 10
4/02


    • Conditional Branches.
      • BEQ, BNE, BGT (signed), BLT (signed)
      • A good dec/hex converter that works with signed numbers: binaryconvert.com
  • Wednesday
    • Engineering: Deciphering how the 6811 energizes the Address, Data and Control busses when it runs a program.
CSC270 FigureA14.png CSC270 TableFigureA14.png
(taken from the 6811 Reference Manual)
    • The main signals: E, R/W, and LIR
6811MainSignalsE RW LIR.png
    • Screen shots:

CSC270TimingDiagramLoop1.jpg

CSC270TimingDiagramLoop2.jpg

CSC270TimingDiagramLoop3.jpg

CSC270TimingDiagramLoop4.jpg

  • Friday
    • Sentence of the week, found in the 6811 Pocket Reference:
      The term Big Endian comes from Jonathan Swift’s satire Gulliver’s Travels. In Swift’s book, a Big Endian refers to a person who cracks their egg on the big end. The Lilliputians considered the big endians as inferiors. The big endians fought a long and senseless war with the Lilliputians who insisted it was only proper to break an egg on the little end.
    • Negative numbers in binary
    • Condition Codes: HINZVC
      • Z: Zero
      • V: Overflow
      • N: Negative
      • C: Carry
      • H: Half-Carry
      • I: Interrrupt Mask
    • Conditional Branches
      • BEQ
      • BNE
      • BGT
      • BLT
      • BRA (unconditional)
  • Negative (signed) numbers are covered in the 6811 Manual, In Section 3.
  • The Condition Code register is also covered in Section 3.
Week 11
4/09
  • Monday
    • Review of negative numbers.
    • New question: How can we extend a positive or negative number from 1 byte to two bytes?
    • Review Condition Code Register
    • Rule:
      • Every instruction that makes information pass through ALU will modify the CC bits (HINZVC). Typical instructions: Add, Sub, Shift, Rotate, Multiply, Divide, And, Or, Not, Xor, and Compare (which is a subtract operation).
      • Special instructions can modify individual bits: For example CLC and SEC can be used to clear or set the Carry bit.
      • Some instruction can have different outcome depending on some of the CC bits: Conditional Branches: BEQ, BNE, BLT, BGT.
    • The Compare (CMP) instruction:
      • It is a subtract operation that does not store the result of the subtraction, but instead sets the HINZVC bit depending on the result of the subtraction.
    • The Conditional Branch instructrions:
      • They operate as follows:
  if specific CC bit == some predefined value:
        PC = PC + displacement
  else:
        PC = PC + 1
For example:
   BEQ, (Branch if equal)
   if  Z bit == 1:
       PC = PC + displacement
   else:
       PC = PC + 1
      • Computing the displacement in hex. Case #1
      LDAA   alpha
      CMPA   #5	      	  ; alpha==5?
      BEQ    same
diff: ...     	      	  ; go here if != 5
      ...
      ...
same: ...     	      	  ; go here if == 5
Assume BEQ is at Address 0010 and same at Address 0023. Address of diff label is at 0012 (because BEQ label takes 2 bytes). 0012 + displacement must be equal to 0023. Hence displacement is 11 (only 2 digits, as only 1-byte displacement allowed).
      • Case #2: branching back
same: ...                 ; go here if == 5

      LDAA   alpha
      CMPA   #5           ; alpha==5?
      BEQ    same
diff: ...     	      	  ; go here if != 5
      ...
      ...
Assume BEQ is at address 0020, and same is at 0005. The displacement must be a negative number that, once added to 0022 (because that's the address of the instruction after BEQ), will result in 0005.
   0022
+ XXXX
---------
   0005
There are many different ways to compute XXXX. Which ever way we find, we find XXXX = FFE3, so the displacement is the lower byte, or E3.


  • Wednesday
  • Friday
  • Reading
    • The condition code register is covered in Section 3.5 of the Motorola 6811 Manual. Skip Section 4.
Week 12
4/16
  • Monday
  • Wednesday
  • Friday
Week 13
4/23
  • Monday
  • Wednesday
  • Friday
Week 14
4/30
  • Monday
  • Wednesday: Last Day of Class



Links and Resources

Printing

  • How to print a text file (pure ASCII, not an MS Word document) from a beowulf account to the printer @ FH354:
  cprint -15  myFile.txt
  • How to print a pdf from a beowulf account to the printer @ FH354:
  lpr -P ford354 max232.pdf
  • How to print an image to the same printer, from a beowulf account:
  convert myImage.jpg  myImage.pdf
  lpr -P ford354 myImage.pdf

Programs

Software

Demos of Various Circuit

HadesGate.png























Free Circuit CAD Systems

(the video shows an analog circuit, but logic gates are also supported)



























PSpice 9

Pspice9.jpg
  • Pspice 9, Student version. An nice alternative to drawing schematics by hand.
  • This is a Windows version. (I have tried to make it work under wine/Mac OS X but haven't been able to make it load the libraries correctly)
  • Make sure you select the schematics option when installing the software.
  • Select Tools/Schematics when starting the editor
  • The schematics editor is located in C:\Program Files\OrCAD_Demo\PSpice\PDesign.exe upon installation.
  • Download here!
  • PSpice Tutorial

Integrated Circuit Data-Sheets

Ic.jpg

Motorola 68HC11 Documentation

6811.jpg




Back To Main Page



Retrieved from "http://dominiquethiebaut.com/dftwiki3/index.php?title=CSC270_Weekly_Schedule_2012&oldid=14227"